Getting Started with RISC-V
1h 32mIntermediate2024-01-30
Authors
Eduardo Corpeño
Electrical Engineer, Computer Programmer, and Teacher for 15+ years
Course details
RISC-V is an open-source instruction set architecture (ISA) that allows for a new era of processor innovation through collaboration and shared technical investment. Combining a fast foundation architecture with a modular approach to design, chipmakers, hobbyists, and users alike find it easy to work with this incredibly flexible yet manageable system.
This course provides an overview of the core concepts, community, ecosystem, philosophy, and architectural principles to help you get started with RISC-V. Join instructor Eduardo Corpeño as he offers insights on using multiplication and division, floating-point operations, and other ISA extensions. Be sure to check out the demos and simulation examples at the end of the course to get a better understanding of how RISC-V can be used in real-world applications.
This course provides an overview of the core concepts, community, ecosystem, philosophy, and architectural principles to help you get started with RISC-V. Join instructor Eduardo Corpeño as he offers insights on using multiplication and division, floating-point operations, and other ISA extensions. Be sure to check out the demos and simulation examples at the end of the course to get a better understanding of how RISC-V can be used in real-world applications.
Skills covered
Raspberry PiInternet of ThingsHardwareProgramming FoundationsLearningSoftware Development
Concepts
0. Introduction
- 01 - Get started with RISC-V
- 02 - What you should know
1. About RISC-V
- 03 - What is RISC-V
- 04 - Reception and growth of RISC-V
- 05 - Applications of RISC-V
- 06 - The future of RISC-V
2. The RISC-V Community
- 07 - RISC-V International
- 08 - The RISC-V ecosystem
- 09 - Ways to contribute to RISC-V
- 10 - Available resources
3. The RISC Architecture Philosophy
- 11 - CISC vs. RISC
- 12 - Memory access
- 13 - Instruction encoding
- 14 - Microcode
- 15 - CISC and RISC today
4. The RISC-V Instruction Set Architecture
- 16 - Modularity of the RISC-V ISA
- 17 - RISC-V naming convention
- 18 - The RV32I base integer ISA
- 19 - CPU registers
- 20 - RV32I instruction set
5. RISC-V ISA Extensions
- 21 - Multiplication and division
- 22 - Floating-point operations
- 23 - Compressed ISA extension
- 24 - Other ISA extensions
6. RISC-V Simulation Examples
- 25 - RISC-V assembly language
- 26 - RISC-V development tools
- 27 - The Venus simulator
- 28 - A simple coding demo
- 29 - Step simulation demo
- 30 - LED matrix application
- 31 - A simple embedded application
Conclusion
- 32 - Next steps